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PM6641TR Datasheet(PDF) 37 Page - STMicroelectronics

Part # PM6641TR
Description  Monolithic VR for chipset and DDR2/3 supply for ultra-mobile PC (UMPC) applications
PDF  47 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PM6641TR Datasheet(HTML) 37 Page - STMicroelectronics

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PM6641
Components selection
37/47
The losses due to the input capacitor are thus maximized when the duty-cycle is 0.5:
Equation 18
The input capacitor should be selected with a RMS rated current higher than ICinRMS,MAX.
Tantalum capacitors are good in term of low ESR and small size, but they occasionally can
burn out if subjected to very high current during operation. Multi-Layers-Ceramic-Capacitors
(MLCC) have usually a higher RMS current rating with smaller size and very low ESR.
When only one common input capacitor is chosen for the application, instead of one
dedicated capacitor for each regulator (close to each input power supply pins), the total
input current can be quite different from the arithmetic sum of the buck regulators RMS input
currents, if phase management is allowed (see Chapter 7.9: Phase management on
page 30
section for details).
8.3
Output capacitor selection
Using tantalum or electrolytic capacitors, the selection is made referring to ESR and voltage
rating rather than by a specific capacitance value.
The output capacitor has to satisfy the output voltage ripple requirements. At a given
switching frequency, small inductor values are useful to reduce the size of the choke but
increase the inductor current ripple. Thus, to reduce the output voltage ripple a low ESR
capacitor is required:
Equation 19
where VRIPPLE is the maximum tolerable ripple voltage.
The zero introduced by the output capacitor ESR must be higher than the switching
frequency or must be compensated (see Chapter 7.3: SW regulators control loop on
page 24
section for details):
Equation 20
In order to minimize the output voltage ripple, ceramic capacitors are suggested.
(
)2
MAX
,
LOAD
Cin
MAX
,
CinRMS
2
Cin
loss
I
5
.
0
ESR
I
ESR
P
=
=
MAX
,
L
MAX
,
RIPPLE
I
V
ESR
f
SW
f
Z
>
1
2
π ESR C
OUT
⋅⋅
--------------------------------------------
=



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