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PM6641TR Datasheet(PDF) 40 Page - STMicroelectronics |
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PM6641TR Datasheet(HTML) 40 Page - STMicroelectronics |
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40 / 47 page ![]() Components selection PM6641 40/47 8.5 Layout guidelines Each signal is referred to AGND, the analog ground. In a typical 4-layers PCB one internal layer should be dedicated to this common ground. The IC thermal pad must be connected to AGND plane through multiple VIAs, in order to remove the IC heat and to obtain the best performance. Furthermore, each switching regulator has a dedicated power ground (SGND_1Sxx); all these SGNDs must be star-connected, in a single point, with AGND. For each switching section the power componets (inductor and input/output capacitors) must be placed near the VSW_1Sxx, VIN_1Sxx and SGND_1Sxx pins and connected with large (at least 20mils or larger) and short PCB traces, in order to limit the path of the current high frequency components and, consequently, to reduce the injected noise. If the power components routing involves more than one layer, as many VIAs as possible must be inserted to reduce the series resistance and improve the global efficiency. The VTT external components (input and output capacitors) must be placed near the LDO regulator input (LDOIN) and output (VTT) pins, and must be routed with large and short traces, in order to limit the parasitic series resistance. The feedback pins (VFB_1Sxx and VTTFB) must reach the feedback points through dedicated PCB traces, typically 10mils width; larger feedback traces are not required. For reference layout, refer to PM6641 Evaluation Kit document. |
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