ADuC7023BCPZ62I-R7 datasheet(30/96 Pages) AD

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ADuC7023

Data Sheet

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TYPICAL OPERATION

When configured via the ADC control and channel selection

registers, the ADC converts the analog input and provides a

12-bit result in the ADC data register.

The top four bits are the sign bits. The 12-bit result is placed

from Bit 16 to Bit 27 as shown in Figure 22. Note that in fully

differential mode, the result is represented in twos complement

format. In single-ended mode, the result is represented in

straight binary format.

SIGN BITS

12-BIT ADC RESULT

16 15

Figure 22. ADC Result Format

The same format is used in DACxDAT, simplifying the software.

Current Consumption

The ADC in standby mode, that is, powered up but not

converting, typically consumes 640 μA. The internal reference

adds 140 μA. During conversion, the extra current is 0.3 μA

multiplied by the sampling frequency (in kHz).

Timing

Figure 23 gives details of the ADC timing. Users control the

ADC clock speed and the number of acquisition clocks in the

ADCCON MMR. By default, the acquisition time is eight

clocks, and the clock divider is two. The number of extra clocks

(such as bit trial or write) is set to 19, which gives a sampling

rate of 774 kSPS. For conversion on the temperature sensor, set

ADCCON = 0x37A3. When using multiple channels including

the temperature sensor, the timing settings revert to the user-

defined settings after reading the temperature sensor channel.

ADC CLOCK

ACQ

BIT TRIAL

DATA

ADCSTA = 0

ADCSTA = 1

ADC INTERRUPT

WRITE

CONVSTART

ADCBUSY

ADCDAT

Figure 23. ADC Timing

MMR INTERFACE

The ADC is controlled and configured via the eight MMRs

described in this section.

ADCCON Register

Name:

ADCCON

Address:

0xFFFF0500

Default value:

0x0600

Access:

Read/write

Function:

ADCCON is an ADC control register

that allows the programmer to enable the

ADC peripheral, select the mode of

operation of the ADC (either in single-

ended mode or fully differential mode),

and select the conversion type. This MMR

is described in Table 24.

Table 24. ADCCON MMR Bit Designations

Bit

Value

Description

15 to 14

Reserved.

Temperature sensor conversion enable. Set to 1 for temperature sensor conversions and single

software conversions. Set to 0 for normal ADC conversions.

12 to 10

ADC clock speed.

000

fADC/1. This divider is provided to obtain 1 MSPS ADC with an external clock <41.78 MHz.

001

fADC/2 (default value).

010

fADC/4.

011

fADC/8.

100

fADC/16.

101

fADC/32.

9 to 8

ADC acquisition time.

2 clocks.

4 clocks.

8 clocks (default value).

16 clocks.

Rev. E

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