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LQFP64 Datasheet(PDF) 59 Page - STMicroelectronics |
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LQFP64 Datasheet(HTML) 59 Page - STMicroelectronics |
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59 / 116 page ![]() DocID14619 Rev 13 59/116 SPC560B40x/50x, SPC560C40x/50x Package pinouts and signal descriptions 115 VHYS CC C Input hysteresis CMOS (Schmitt Trigger) —0.1VDD —— V VOL CC P Output low level Push Pull, IOL = 2mA, VDD = 5.0 V ± 10%, PAD3V5V = 0 (recommended) — — 0.1VDD V C Push Pull, IOL = 1mA, VDD = 5.0 V ± 10%, PAD3V5V = 1 (2) — — 0.1VDD C Push Pull, IOL = 1mA, VDD = 3.3 V ± 10%, PAD3V5V = 1 (recommended) —— 0.5 ttr CC D Output transition time output pin(3) CL = 25pF, VDD = 5.0 V ± 10%, PAD3V5V = 0 —— 10 ns CL = 50pF, VDD = 5.0 V ± 10%, PAD3V5V = 0 —— 20 CL = 100pF, VDD = 5.0 V ± 10%, PAD3V5V = 0 —— 40 CL = 25pF, VDD = 3.3 V ± 10%, PAD3V5V = 1 —— 12 CL = 50pF, VDD = 3.3 V ± 10%, PAD3V5V = 1 —— 25 CL = 100pF, VDD = 3.3 V ± 10%, PAD3V5V = 1 —— 40 WFRST SR P RESET input filtered pulse —— — 40 ns WNFRST SR P RESET input not filtered pulse —1000 — — ns |IWPU|CC P Weak pull-up current absolute value VDD = 3.3 V ± 10%, PAD3V5V = 1 10 — 150 µA DVDD = 5.0 V ± 10%, PAD3V5V = 0 10 — 150 PVDD = 5.0 V ± 10%, PAD3V5V = 1 (2) 10 — 250 1. VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified 2. This transient configuration does not occurs when device is used in the VDD = 3.3 V ± 10% range. 3. CL includes device and package capacitance (CPKG < 5 pF). Table 25. Reset electrical characteristics (continued) Symbol C Parameter Conditions(1) Value Unit Min Typ Max |
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