LQFP64 datasheet(86/116 Pages) STMICROELECTRONICS

86 / 116 page

Package pinouts and signal descriptions

SPC560B40x/50x, SPC560C40x/50x

86/116

DocID14619 Rev 13

Table 45. ADC conversion characteristics

Symbol

Parameter

Conditions(1)

Value

Uni

Min

Typ

Max

VSS_ADC

—

Voltage on

VSS_HV_ADC (ADC

reference) pin with

respect to ground

(VSS)

(2)

—

0.1

—

0.1

VDD_ADC

—

Voltage on

VDD_HV_ADC pin

(ADC reference) with

respect to ground

(VSS)

—VDD0.1

—

VDD+0.1

VAINx

—

Analog input

voltage(3)

—VSS_ADC0.1

—

VDD_ADC+0.

fADC

—

ADC analog

frequency

—

32 + 4%



ADC_SY

—

ADC digital clock duty

cycle (ipg_clk)

ADCLKSEL = 1(4)

—

IADCPWD

—

ADC0 consumption in

power down mode

——

—

µA

IADCRUN

—

ADC0 consumption in

running mode

——

—

tADC_PU

— ADC power up delay

—

1.5

µs

Sampling time(5)

fADC = 32 MHz, INPSAMP = 17

0.5

—

µs

fADC = 6 MHz, INPSAMP = 255

—

Conversion time(6)

fADC = 32 MHz, INPCMP = 2

0.625

—

µs

ADC input sampling

capacitance

——

—

CP1

ADC input pin

capacitance 1

——

—

CP2

ADC input pin

capacitance 2

——

—

CP3

ADC input pin

capacitance 3

——

—

RSW1

Internal resistance of

analog source

——

—



RSW2

Internal resistance of

analog source

——

—



RAD

Internal resistance of

analog source

——

—



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