ADC12D040

SNAS171E – JUNE 2002 – REVISED MARCH 2013

www.ti.com

To help isolate the pulses at the ADC input from the amplifier output, use RCs at the inputs, as can be seen in

Figure 31 and Figure 32. These components should be placed close to the ADC inputs because the input pins of

the ADC is the most sensitive part of the system and this is the last opportunity to filter that input.

For Nyquist applications the RC pole should be at the ADC sample rate. The ADC input capacitance in the

sample mode should be considered when setting the RC pole. Setting the pole in this manner will provide best

SNR performance.

To obtain best SINAD and ENOB performance, reduce the RC time constant until SNR and THD are numerically

equal to each other. To obtain best distortion and SFDR performance, eliminate the RC altogether.

For undersampling applications, RC pole should be set at about 1.5 to 2 times the maximum input frequency to

maintain a linear delay response.

Note that the ADC12DL040 is not designed to operate with single-ended inputs. However, doing so is possible if

the degraded performance is acceptable. See Single-Ended Operation

Figure 31 shows a narrow band application with a transformer used to convert single-ended input signals to

differential. Figure 32 shows the use of a fully differential amplifier for single-ended to differential conversion.

Figure 31. Application Circuit using Transformer or Differential Op-Amp Drive Circuit

20

Submit Documentation Feedback

Copyright © 2002–2013, Texas Instruments Incorporated

Product Folder Links: ADC12D040