L9305 datasheet(42/107 Pages) STMICROELECTRONICS

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8.2

Main & reference oscillators

The L9305 has two internal clock oscillators, main and reference. The main clock oscillator provides the timing

and control for all device operating functions. The reference clock oscillator provides the monitoring reference to

verify the main oscillator. The monitor is able to check if one of the two oscillators is stuck and if there is a strong

frequency mismatch between them. In case the main oscillator isn’t toggling or there is a strong frequency

mismatch on it, the monitor will generate an asynchronous activation of a safety switch off path to disable the fail-

safe pre-driver: this disable condition will last until fault is recovered.

If a stuck fault on diagnostic oscillator is detected, the device keeps working but reports the corresponding fault

through SPI Service Fault 2 register.

Basic implementation of clock monitor is shown in the next figure.

Oscillator monitor is able to detect either stuck condition of one of the two clocks or frequency error of one clock

respect the other.

Figure 18. Oscillator monitor

Main Oscillator

Divider

Clock

Checker

Clock

Checker

Divider

2nd Oscillator

Low Frequency

HighFrequency

Stuck

Low Frequency

HighFrequency

Stuck

GADG2709181324PS.png

8.2.1

Main and reference oscillators electrical characteristics

4.75 V ≤ VDD ≤ 5.5 V; 5.5 V ≤ VBATP ≤ 19 V; -40 °C ≤ Tj ≤ 175 °C unless otherwise noted. All voltages refer to

GNDA pin.

Table 30. Main and reference oscillator safety parameters

Symbol

Parameter

Test condition

Min

Typ

Max

Unit

OSCMON_timeout

Timeout for stuck detection

Guaranteed by scan

–

µs

OSC_freq_error

Max tolerable delta between oscillators

Guaranteed by scan

-15

–

8.3

Safety switch-off path

In case an over voltage condition is detected on either internal analog or digital supply lines a safety switch-off

path is triggered in parallel to the main diagnostic functions. The meaning of this safety path is to ensure a safe

state for the system even in case the over voltage condition, caused by overshoot, latent fault, etc., will lead to

absolute violation for the internal circuitry: in this catastrophic event the functionality of the device cannot be

guaranteed so a high voltage protected circuitry is needed to guarantee the switch-off of the external fail safe

transistor(s) and disconnect the safety relevant loads from the main supply line. The safety circuitry is placed in

an isolated layout area where no top routing is allowed and a safe distance from other circuits is kept to avoid

cross-talk.

The safety off-path is triggered by POR event, main oscillator fault and EN_DR pin low voltage too; safety_fault

trigger signal is the asynchronous combination of the main oscillator fault, EN_DR monitor and digital supply

overvoltage detection, i.e. the faults that cannot be directly managed by the digital core.

An echo of safety off path activation is fed back to the digital core and mapped on the SPI registers: in this way at

power up it is always possible to test the safety off path functionality through EN_DR pin actuation.

L9305

Safety features

DS12774 - Rev 10

page 42/107

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