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PIC16F15213 Datasheet(PDF) 98 Page - Microchip Technology |
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PIC16F15213 Datasheet(HTML) 98 Page - Microchip Technology |
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98 / 408 page ![]() 14. WDT - Watchdog Timer The Watchdog Timer (WDT) is a system timer that generates a Reset event if the firmware does not issue a CLRWDT instruction within the time-out period. The Watchdog Timer is typically used to reset the processor in the event of a software malfunction, but can also be used to wake the device when in Sleep mode. The WDT has the following features: • Selectable clock sources • Multiple operating modes: – WDT is always on – WDT is off when in Sleep – WDT is controlled by software – WDT is always off • Configurable time-out period from 1 ms to 256 seconds (nominal) • Multiple Reset conditions • Operation during Sleep Figure 14-1. Watchdog Timer (WDT) Block Diagram Filename: WDT Block Diagram.vsdx Title: Last Edit: 1/23/2020 First Used: Notes: Rev. WDT Bloc k 1/23/2020 23-bit WDT Prescaler Counter PS[4:0] WDT Time-out CS 1 0 WDTE[1:0] = 01 SEN WDTE[1:0] = 11 WDTE[1:0] = 10 Sleep WDTE[1:0] = 00 14.1 Selectable Clock Sources The WDT can derive its time base from either the 31.25 kHz MFINTOSC or the 31 kHz LFINTOSC as selected by the WDT Clock Source Select (CS) bit. Important: Time intervals detailed in this chapter are based on a minimum nominal interval of 1 ms generated from the LFINTOSC clock source. 14.2 WDT Operating Modes The WDT module has four operating modes controlled by the Watchdog Timer Enable (WDTE) bits. See Table 14-1. Table 14-1. WDT Operating Modes WDTE[1:0] SEN Device Mode WDT Mode 11 x X Active PIC16F15225/45 WDT - Watchdog Timer © 2020 Microchip Technology Inc. Preliminary Datasheet DS20006389B-page 98 |
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