SPC560B50x datasheet(77/116 Pages) STMICROELECTRONICS

77 / 116 page

DocID14619 Rev 13

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SPC560B40x/50x, SPC560C40x/50x

Package pinouts and signal descriptions

115

Figure 17. Slow external crystal oscillator (32 kHz) timing diagram

3.23

FMPLL electrical characteristics

The device provides a frequency-modulated phase-locked loop (FMPLL) module to

generate a fast system clock from the main oscillator driver.

OSCON bit (OSC_CTL register)

TSXOSCSU

VOSC32K_XTAL

VSXOSC

valid internal clock

90%

10%

1/fSXOSC

Table 40. Slow external crystal oscillator (32 kHz) electrical characteristics

Symbol

Parameter

Conditions(1)

Value

Unit

Min

Typ

Max

fSXOSC

SR — Slow external crystal oscillator frequency

—

32.768

kHz

VSXOSC

CC T Oscillation amplitude

—

2.1

—

ISXOSCBIAS CC T Oscillation bias current

—

2.5

—

µA

ISXOSC

CC T Slow external crystal oscillator consumption

—

µA

TSXOSCSU CC T Slow external crystal oscillator start-up time

—

2(2)

VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified. Values are specified for no neighbor

GPIO pin activity. If oscillator is enabled (OSC32K_XTAL and OSC32K_EXTAL pins), neighboring pins should not toggle.

Start-up time has been measured with EPSON TOYOCOM MC306 crystal. Variation may be seen with other crystal.

Table 41. FMPLL electrical characteristics

Symbol

Parameter

Conditions(1)

Value

Unit

Min

Typ

Max

fPLLIN

SR — FMPLL reference clock(2)

—4

—

MHz



PLLIN

SR —

FMPLL reference clock duty

cycle(2)

—40

—

fPLLOUT CC D FMPLL output clock frequency

—

MHz

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