SPC560B50x datasheet(43/116 Pages) STMICROELECTRONICS

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DocID14619 Rev 13

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SPC560B40x/50x, SPC560C40x/50x

Package pinouts and signal descriptions

115

VIN

Voltage on any GPIO pin with respect to ground

(VSS)

—VSS0.1

—

Relative to VDD

—VDD+0.1

IINJPAD

Injected input current on any pin during overload

condition

—

55

IINJSUM

Absolute sum of all injected input currents

during overload condition

—

50

TVDD

SR VDD slope to ensure correct power up

(6)

—3.0(7)

250 x 103

(0.25

[V/µs])

V/s

100 nF capacitance needs to be provided between each VDD/VSS pair

330 nF capacitance needs to be provided between each VDD_LV/VSS_LV supply pair.

400 nF capacitance needs to be provided between VDD_BV and the nearest VSS_LV (higher value may be needed

depending on external regulator characteristics).

100 nF capacitance needs to be provided between VDD_ADC/VSS_ADC pair.

Full electrical specification cannot be guaranteed when voltage drops below 3.0 V. In particular, ADC electrical

characteristics and I/Os DC electrical specification may not be guaranteed. When voltage drops below VLVDHVL, device is

reset.

Guaranteed by device validation.

Minimum value of TVDD must be guaranteed until VDD reaches 2.6 V (maximum value of VPORH).

Table 14. Recommended operating conditions (5.0 V)

Symbol

Parameter

Conditions

Value

Unit

Min

Max

VSS

SR Digital ground on VSS_HV pins

—

VDD

(1)

Voltage on VDD_HV pins with respect to

ground (VSS)

—4.5

5.5

Voltage drop(2)

3.0

5.5

VSS_LV

(3)

Voltage on VSS_LV (low voltage digital

supply) pins with respect to ground (VSS)

—VSS0.1

VSS+0.1

VDD_BV

(4)

Voltage on VDD_BV pin (regulator supply)

with respect to ground (VSS)

—4.5

5.5

Voltage drop(2)

3.0

5.5

Relative to VDD

VDD0.1 VDD+0.1

VSS_ADC

Voltage on VSS_HV_ADC (ADC reference)

pin with respect to ground (VSS

—VSS0.1

VSS+0.1

VDD_ADC

(5)

Voltage on VDD_HV_ADC pin (ADC

reference) with respect to ground (VSS)

—4.5

5.5

Voltage drop(2)

3.0

5.5

Relative to VDD

VDD0.1 VDD+0.1

VIN

Voltage on any GPIO pin with respect to

ground (VSS)

—VSS0.1

—

Relative to VDD

—VDD+0.1

Table 13. Recommended operating conditions (3.3 V) (continued)

Symbol

Parameter

Conditions

Value

Unit

Min

Max

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