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STM32W108HB Datasheet(PDF) 52 Page - STMicroelectronics

Part # STM32W108HB
Description  High-performance, IEEE 802.15.4 wireless system-on-chip with up to 256 Kbytes of embedded Flash memory
PDF  278 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32W108HB Datasheet(HTML) 52 Page - STMicroelectronics

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System modules
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
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Doc ID 16252 Rev 14
6.3.6
Clock switching registers
Clock sleep mode control register (
CLK_SLEEPCR)
The sleep timer controls the low power clock gated modes.
Clearing the LSI10KEN bit in the CLK_SLEEPCR register before executing WFI with the
SLEEPDEEP bit set to '1' in the SCB_SCR register (for more details refer to the Cortex-M3
Programming manual PM0056) causes deep sleep 2 mode to be entered. Setting the
LSI10KEN bit in the CLK_SLEEPCR register causes deep sleep 1 mode to be entered.
Address: 0x4000 0008
Reset value: 0x0000 0002
Reserved, must be kept at reset value
LSI10KEN:
LSEEN:
Low-speed internal 10 KHz clock (LSI10K) control register (CLK_LSI10KCR)
Address: 0x4000 000C
Reset value: 0x0000 0000
Reserved, must be kept at reset value
TUNE[3:0]:
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
LSI10KEN
LSEEN
rw
rw
Bits [31:2]
Bit 1
1: Enables 10 kHz internal RC during deep sleep mode.
2: Disables 10 kHz internal RC during deep sleep mode
Bit 0
1: Enables 32 kHz external oscillator during deep sleep mode.
2: Disables 32 kHz external oscillator during deep sleep mode.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
TUNE[3:0]
rw
rw
rw
rw
Bits [31:4]
Bit [3:0]
Tunes the value for the HSI clock.



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