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STM32W108HB Datasheet(PDF) 64 Page - STMicroelectronics |
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STM32W108HB Datasheet(HTML) 64 Page - STMicroelectronics |
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64 / 278 page  System modules STM32W108HB STM32W108CC STM32W108CB STM32W108CZ 64/278 Doc ID 16252 Rev 14 Sleep timer count low register (SLPTMR_CNTL) Address: 0x4000 6014 Reset value: 0x0000 0000 Reserved, must be kept at reset value CNTL[15:0]: Sleep timer counter low value Sleep timer compare A high register (SLPTMR_CMPAH) Address: 0x4000 6018 Reset value: 0x0000 FFFF Reserved, must be kept at reset value CMPAH[15:0]: Sleep timer compare A high value 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CNTL[15:0] rrr rrr r r r r r r r r r r Bits [31:16] Bits [15:0] This register is only valid following a read of the SLPTMR_CNTH register. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CMPAH[15:0] rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw Bits [31:16] Bits [15:0] Sleep timer compare value - writing to this register updates the SLPTMR_CMPAH register directly and updates the SLPTMR_CMPAL register from the hold register. This value can only be changed when the sleep timer is disabled (EN bit set to 0 in the SLPTMR_CR register). If the value is changed when the sleep timer is enabled (EN bit set to ‘1’ in the SLPTMR_CR register), a spurious interrupt may be generated. Therefore it is recommended to disable sleep timer interrupts before changing this register. |
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