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STM32W108HB Datasheet(PDF) 102 Page - STMicroelectronics

Part # STM32W108HB
Description  High-performance, IEEE 802.15.4 wireless system-on-chip with up to 256 Kbytes of embedded Flash memory
PDF  278 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32W108HB Datasheet(HTML) 102 Page - STMicroelectronics

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General-purpose input/output
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
102/278
Doc ID 16252 Rev 14
8.5.11
GPIO debug configuration register (GPIO_DBGCR)
Address offset: 0xBC00
Reset value:
0x0000 0010
Reserved, must be kept at reset value
DBGDIS: Disable debug interface override of normal GPIO configuration
EXTREGEN: Disable REG_EN override of PA7's normal GPIO configuration
PADDRIVE: Global pad drive strength
Reserved, must be kept at reset value
8.5.12
GPIO debug status register (GPIO_DBGSR)
Address offset: 0xBC04
Reset value:
0x0000 0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
DBGDIS
EXTR
EGEN
PAD
DRIVE
Reserved
rw
rw
rw
Bit [31:6]
Bit 5
0: Permits debug interface to be active.
1: Disables debug interface (if it is not already active).
Bit 4
0: Enable override
1: Disable override
Bit 3
0: Disables the pad drive strength
1: Enables the pad drive strength
Bit [2:0]
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
BOOT
MODE
Reserved
FORCE
DBG
SWEN
rr
r
Bit [31:4] Reserved, must be kept at reset value
Bit 3 BOOTMODE: The state of the nBOOTMODE signal sampled at the end of reset
0: nBOOTMODE was not asserted (it read high)
1: nBOOTMODE was asserted (it read low)



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