Z8FS040 datasheet(37/56 Pages) ZILOG

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ZMOTION

TM Detection and Control Family

Product Specification

PS028506-1110

PRELIMINARY

PIR Process Rate (ePIR_Process_Rate)

Bit

Field

PIR Process Rate

Control

Read

Address

F3H

F4H

PIR Process Rate (Bits 0-7)

Controlled by PIR engine

The PIR Process Rate Indicator is provided by the Engine to determine if the user application process

and interrupts overhead is impacting the performance of the Engine. If the Engine process rate drops

significantly, its ability to detect motion can be significantly reduced. This value is typically used at the

application development stage. This number gives an indication of how much CPU time the Engine is

receiving. Higher numbers are better. Generally, if the process rate drops below 0080h, the ability to

detect motion could be compromised.

Note: The 16 bit value provided by these two 8 bit registers must be read as an atomic operation by the

application. This can be ensured by either using the CPU’s ATM instruction or by disabling interrupts

while reading the two 8 bit registers.

PIR Sample Size Register (ePIR_Sample_Size)

Bit

Field

PIR Sample Size

Control

Read/Write

Address

F5H

PIR Sample Size (Bits 0-7)

Controlled by application

This register controls the amount of averaging that the engine performs on the incoming PIR signal ADC

samples. More averaging improves signal noise immunity at the cost of a slower sample rate.

PIR Debounce Time Register (ePIR_Debounce)

Bit

Field

PIR Debounce Time

Control

Read/Write

Address

F6H

PIR Debounce Time (Bits 0-7)

Controlled by application

This register controls the amount of time that the engine will wait to fully debounce a motion signal.

Longer times result in detection of subtle motion at the cost of more potential false motion detections.

Valid range is from 01h to FFh.

Z8FS040 Datasheet(PDF) 37 Page - Zilog, Inc.

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