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AT49LL080 Datasheet(PDF) 17 Page - ATMEL Corporation |
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AT49LL080 Datasheet(HTML) 17 Page - ATMEL Corporation |
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17 / 31 page ![]() 17 AT49LL080 3273C–FLASH–5/03 Notes: 1. Check B7 to determine sector erase or program completion. B6 - B0 are invalid while B7 = “0”. 2. If both B5 and B4 are “1”s after a sector erase attempt, an improper command sequence was entered. 3. B1 does not provide a continuous indication of Write Lock bit, TBL pin or WP pin values. The WSM interrogates the Write Lock bit, TBL pin or WP pin only after a sector erase or program operation. Depending on the attempted operation, it informs the system whether or not the selected sector is locked. 4. B0 is reserved for future use and should be masked out when polling the status register. A/A Mux Interface The following information applies only to the AT49LL080 when in A/A Mux Mode. Infor- mation on LPC Mode (the standard operating mode) is detailed earlier in this document. Electrical characteristics in A/A Mux Mode are provided on pages starting from page 24. The AT49LL080 is designed to offer a parallel programming mode for faster factory pro- gramming. This mode, called A/A Mux Mode, is selected by having this IC pin high. The IC pin is pulled down internally in the AT49LL080, so a modest current should be expected to be drawn (see Table 1 on page 3 for further information). Four control pins dictate data flow in and out of the component: R/C, OE, WE, and RST. R/C is the A/A Mux control pin used to latch row and column addresses. OE is the data output control pin (I/O0 - I/O7), drives the selected memory data onto the I/O bus, when active WE and RST must be at V IH. Status Register Definition B7 Write State Machine Status (1) 1 Ready 0Busy B6 Erase Suspend Status 1 Sector Erase Suspended 0 Sector Erase in Progress/Completed B5 Erase Status (2) 1 Error in Sector Erasure 0 Successful Sector Erase B4 Program Status 1 Error in Program 0 Successful Program B2 Program Suspend Status 1 Program Suspended 0 Program in Progress/Completed B1 Device Protect Status (3) 1 Write Lock Bit, TBL Pin or WP Pin Detected, Operation Abort 0 Unlock B0 Reserved for Future Enhancements (4) |
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