PCF5271CVM100 datasheet(33/56 Pages) FREESCALE

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Preliminary Electrical Characteristics

MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2

Freescale Semiconductor

8.2

Thermal Characteristics

Table 27 lists thermal resistance values

This device contains circuitry protecting against damage due to high static voltage or

electrical fields; however, it is advised that normal precautions be taken to avoid application of

any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of

operation is enhanced if unused inputs are tied to an appropriate logic voltage level (e.g.,

either VSS or OVDD).

Input must be current limited to the value specified. To determine the value of the required

current-limiting resistor, calculate resistance values for positive and negative clamp voltages,

then use the larger of the two values.

All functional non-supply pins are internally clamped to VSS and OVDD.

Power supply must maintain regulation within operating OVDD range during instantaneous

and operating maximum current conditions. If positive injection current (Vin > OVDD) is greater

than IDD, the injection current may flow out of OVDD and could result in external power supply

going out of regulation. Insure external OVDD load will shunt current greater than maximum

injection current. This will be the greatest risk when the processor is not consuming power

(ex; no clock).Power supply must maintain regulation within operating OVDD range during

instantaneous and operating maximum current conditions.

Table 27. Thermal Characteristics

Characteristic

Symbol

196

MAPBGA

160QFP

Unit

Junction to ambient, natural convection

Four layer board (2s2p)

JMA

321,2

NOTES:

JMA and Ψjt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection.

Motorola recommends the use of

JmA and power dissipation specifications in the system design to prevent

device junction temperatures from exceeding the rated specification. System designers should be aware that

device junction temperatures can be significantly influenced by board layout and surrounding devices.

Conformance to the device junction temperature specification can be verified by physical measurement in the

customer’s system using the

jt parameter, the device power dissipation, and the method described in

EIA/JESD Standard 51-2.

Per JEDEC JESD51-6 with the board horizontal.

403,4

JMA and Ψjt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection.

Motorola recommends the use of

JmA and power dissipation specifications in the system design to prevent

device junction temperatures from exceeding the rated specification. System designers should be aware that

device junction temperatures can be significantly influenced by board layout and surrounding devices.

Conformance to the device junction temperature specification can be verified by physical measurement in the

customer’s system using the

jt parameter, the device power dissipation, and the method described in

EIA/JESD Standard 51-2.

Per JEDEC JESD51-6 with the board horizontal.

°C/W

Junction to ambient (@200 ft/min)

Four layer board (2s2p)

JMA

295,6

365,6

°C/W

Junction to board

205

Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8.

Board temperature is measured on the top surface of the board near the package.

256

Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8.

Board temperature is measured on the top surface of the board near the package.

°C/W

Junction to case

107

108

°C/W

Junction to top of package

25,9

25,10

°C/W

Maximum operating junction temperature

104

105

PCF5271CVM100 Datasheet(PDF) 33 Page - Freescale Semiconductor, Inc

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