PCF5271CVM100 datasheet(5/56 Pages) FREESCALE

5 / 56 page

Features

MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2

Freescale Semiconductor

— Data formats can be 5, 6, 7 or 8 bits with even, odd or no parity

— Up to 2 stop bits in 1/16 increments

— Error-detection capabilities

— Modem support includes request-to-send (URTS) and clear-to-send (UCTS) lines for two

UARTs

— Transmit and receive FIFO buffers

•I2C Module

— Interchip bus interface for EEPROMs, LCD controllers, A/D converters, and keypads

— Fully compatible with industry-standard I2C bus

— Master or slave modes support multiple masters

— Automatic interrupt generation with programmable level

•

Queued Serial Peripheral Interface (QSPI)

— Full-duplex, three-wire synchronous transfers

— Up to four chip selects available

— Master mode operation only

— Programmable master bit rates

— Up to 16 pre-programmed transfers

•

Four 32-bit DMA Timers

— 20-ns resolution at 50 MHz

— Programmable sources for clock input, including an external clock option

— Programmable prescaler

— Input-capture capability with programmable trigger edge on input pin

— Output-compare with programmable mode for the output pin

— Free run and restart modes

— Maskable interrupts on input capture or reference-compare

— DMA trigger capability on input capture or reference-compare

•

Four Periodic Interrupt Timers (PITs)

— 16-bit counter

— Selectable as free running or count down

•

Software Watchdog Timer

— 16-bit counter

— Low power mode support

•

Frequency Modulated Phase Locked Loop (PLL)

— Crystal or external oscillator reference

— 8 to 25 MHz reference frequency for normal PLL mode

PCF5271CVM100 Datasheet(PDF) 5 Page - Freescale Semiconductor, Inc

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