PCF5271CVM100 datasheet(35/56 Pages) FREESCALE

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Preliminary Electrical Characteristics

MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2

Freescale Semiconductor

High Impedance (Off-State) Leakage Current

Vin = VDD or VSS, All input/output and output pins

IOZ

–1.0

—

1.0

µA

Output High Voltage (All input/output and all output pins)

IOH = –5.0 mA

VOH

OVDD - 0.5

—

Output Low Voltage (All input/output and all output pins)

IOL = 5.0mA

VOL

—

0.5

Weak Internal Pull Up Device Current, tested at VIL Max.

IAPU

–10

—

– 130

µA

Input Capacitance 3

All input-only pins

All input/output (three-state) pins

Cin

—

Load Capacitance4

Low drive strength

High drive strength

—

Core Operating Supply Current 5

Master Mode

IDD

—

135

150

Pad Operating Supply Current

Master Mode

Low Power Modes

OIDD

—

100

TBD

—

µA

DC Injection Current 3, 6, 7, 8

VNEGCLAMP =VSS– 0.3 V, VPOSCLAMP = VDD + 0.3

Single Pin Limit

Total processor Limit, Includes sum of all stressed pins

IIC

–1.0

–10

1.0

NOTES:

Refer to Table 29 for additional PLL specifications.

Refer to the MCF5271 signals section for pins having weak internal pull-up devices.

This parameter is characterized before qualification rather than 100% tested.

pF load ratings are based on DC loading and are provided as an indication of driver strength. High speed interfaces require

transmission line analysis to determine proper drive strength and termination. See High Speed Signal Propagation:

Advanced Black Magic by Howard W. Johnson for design guidelines.

Current measured at maximum system clock frequency, all modules active, and default drive strength with matching load.

All functional non-supply pins are internally clamped to VSS and their respective VDD.

Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate

resistance values for positive and negative clamp voltages, then use the larger of the two values.

Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current

conditions. If positive injection current (Vin > VDD) is greater than IDD, the injection current may flow out of VDD and could

result in external power supply going out of regulation. Insure external VDD load will shunt current greater than maximum

injection current. This will be the greatest risk when the processor is not consuming power. Examples are: if no system

clock is present, or if clock rate is very low which would reduce overall power consumption. Also, at power-up, system clock

is not present during the power-up sequence until the PLL has attained lock.

Table 28. DC Electrical Specifications1 (continued)

Characteristic

Symbol

Min

Typical

Max

Unit

PCF5271CVM100 Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc

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