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MPC875CVR133 Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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MPC875CVR133 Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
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6 / 84 page ![]() MPC875/MPC870 PowerQUICC™ Hardware Specifications, Rev. 4 6 Freescale Semiconductor Features • The MPC875 has a time-slot assigner (TSA) that supports one TDM bus (TDMb) — Allows SCC and SMC to run in multiplexed and/or non-multiplexed operation — Supports T1, CEPT, PCM highway, ISDN basic rate, ISDN primary rate, user-defined — 1- or 8-bit resolution — Allows independent transmit and receive routing, frame synchronization, and clocking — Allows dynamic changes — Can be internally connected to two serial channels (one SCC and one SMC) • PCMCIA interface — Master (socket) interface, release 2.1-compliant — Supports one independent PCMCIA socket on the MPC875/MPC870 — Eight memory or I/O windows supported • Debug interface — Eight comparators: four operate on instruction address, two operate on data address, and two operate on data — Supports conditions: = ≠ <> — Each watchpoint can generate a break point internally • Normal high and normal low power modes to conserve power • 1.8-V core and 3.3-V I/O operation with 5-V TTL compatibility • The MPC875/MPC870 comes in a 256-pin ball grid array (PBGA) package |
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