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ASL5015FHV Datasheet(PDF) 15 Page - NXP Semiconductors |
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ASL5015FHV Datasheet(HTML) 15 Page - NXP Semiconductors |
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15 / 69 page  NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) ASL5xxxyHz All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product data sheet Rev. 2.1 — 5 February 2019 15 / 69 Each block of switches can be assigned to a block of channels and phases; each block can be paralleled with any other block. For paralleling switches, it is necessary that they turn on at the same instant and use the same PWM information. The shiting between two consecutuve switches of the same block is 256 clocks. The shifting between two consecutive switches of different blocks is 512 clocks. Two bits per block are required in the MTP to define which group of channels are assigned to a phase sequence. In Figure 8, there is an example of all blocks assigned to different phase shifting sequences. Switch block 1 Switch block 1 Switch block 1 Switch block 1 Switch block 2 Switch block 2 0 0 0 1 1 0 1 1 Switch block 2 Switch block 2 Switch block 3 Switch block 3 Switch block 3 Switch block 3 Switch block 4 Switch block 4 Switch block 4 Switch block 4 aaa-026320 Figure 8. Blocks of switches can be assigned to phase shifting sequences The MTP configuration bits (2 bits) are showed in the bottom side of the blocks. Depending on the selected configuration, a different block may be highlighted in the graph. These two bits are used to select the phase shifting sequence of the associated channels/switches. When blocks are in series, the two bits should be different in each block. For parallel configuration, the blocks that work together should have the same phase shifting sequence (same 2 bits value). This way of defining the PWM periods guarantees that two or more switches are never closed at the same moment, unless they are in parallel. It makes programming easier and reduces the voltage ripple on the LED string. The sequence for each individual block can be programmed in the MTP. See Section 14 "Nonvolatile Multitime Programmable Memory (MTP)". 8.4 Programming and execution of PWM dimming – ASL50xxyHz In order to reduce data traffic over the serial interface, a polynomial curve defines the PWM dimming profile. Coefficients for the PWM dimming polynomial curves can be stored in an internal nonvolatile MTP (Multiple Time Programmable) memory. This programming is done once at the end of the customer production line. |
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