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ADM2461EBRWZ-R7 Datasheet(PDF) 4 Page - Analog Devices

Part # ADM2461EBRWZ-R7
Description  500 kbps, 5.7 kV RMS, Signal Isolated RS-485 Transceiver with 짹15 kV IEC ESD
PDF  21 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADM2461EBRWZ-R7 Datasheet(HTML) 4 Page - Analog Devices

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ADM2461E/ADM2463E
Data Sheet
Rev. 0 | Page 4 of 21
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
Output Voltage High
VOH
2.4
V
VDD1 = 3.0 V, IOUT = −2.0 mA, VID ≥ −0.03 V
2.0
V
VDD1 = 2.3 V, IOUT = −1.0 mA, VID ≥ −0.03 V
VDD1 − 0.2
V
VDD1 = 1.7 V, IOUT = −500 μA, VID ≥ −0.03 V
Short-Circuit Current
100
mA
VOUT = GND1 or VDD1, RE = 0 V
Three-State Output Leakage Current
IOZR
−1
+0.01
+1
μA
RE = VDD1, RxD = 0 V or VDD1
COMMON-MODE TRANSIENT IMMUNITY
(CMTI)2
250
kV/μs
VCM ≥ ±1 kV, transient magnitude measured
between 20% and 80% of VCM, see Figure 37
and Figure 38
1 ADM2463E only.
2 The CMTI is the maximum common-mode voltage slew rate that can be sustained while maintaining specification compliant operation. VCM is the common-mode
potential difference between the logic and bus sides. The transient magnitude is the range over which the common mode is slewed. The common-mode voltage slew
rates apply to rising and falling common-mode voltage edges.
TIMING SPECIFICATIONS
VDD1 = 1.7 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, TA = TMIN (−40°C) to TMAX (+125°C), unless otherwise noted. All typical specifications are at
TA = 25°C, VDD1 = VDD2 = 3.3 V, unless otherwise noted.
Table 2.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
DRIVER
Maximum Data Rate
500
kbps
Propagation Delay
tDPLH, tDPHL
230
400
ns
RL = 54 Ω, CL = 100 pF, see Figure 33 and Figure 3.
Output Skew
tSKEW
3
100
ns
RL = 54 Ω, CL = 100 pF, see Figure 33 and Figure 3.
Rise Time and Fall Time
tDR, tDF
200
400
800
ns
RL = 54 Ω, CL = 100 pF, see Figure 33 and Figure 3.
Enable Time
tZL, tZH
150
1000
ns
RL = 110 Ω, CL = 50 pF, see Figure 34 and Figure 5.
Disable Time
tLZ, tHZ
1700
2200
ns
RL = 110 Ω, CL = 50 pF, see Figure 34 and Figure 5.
RECEIVER
Propagation Delay
tRPLH, tRPHL
30
200
ns
CL = 15 pF, see Figure 35 and Figure 4.
Output Skew
tSKEW
2.5
50
ns
CL = 15 pF, see Figure 35 and Figure 4.
Enable Time
tZL, tZH
3
50
ns
RL = 1 kΩ, CL = 15 pF, see Figure 36 and Figure 6.
Disable Time
tLZ, tHZ
8
50
ns
RL = 1 kΩ, CL = 15 pF, see Figure 36 and Figure 6.
RECEIVER CABLE INVERT (INVR, INV)
Propagation Delay
tINVRPHL, tINVRPLH
20
40
ns
VID ≥ −200 mV or VID ≤ +200 mV, see Figure 7.
DRIVER CABLE INVERT (INV)
Propagation Delay
tINVDPHL, tINVDPLH
230
400
ns
TxD = 0 V or TxD = VDD1, see Figure 8.



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