LTC6602 datasheet(17/40 Pages) AD

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LTC6601-2

66012f

APPLICATIONS INFORMATION

potential halfway between the V+ and V– pins. Whenever

this pin is not hard tied to a low impedance ground plane,

a high quality ceramic capacitor should be used to bypass

the VOCM pin to a low impedance ground plane (see Layout

Considerations). The LTC6601’s internal common mode

feedback path forces accurate output phase balancing to

reduce even order harmonics, and centers each individual

output about the potential set by the VOCM pin.

VOUTCM = VOCM =

VOUT+ + VOUT–

The outputs (OUT+ and OUT–) of the LTC6601 are capable

of swinging rail-to-rail. They can source or sink up to ap-

proximately 75mA of current. Load capacitances should

be decoupled with at least 25Ω of series resistance from

each output.

The LTC6601 Electrical Characteristics table speciﬁes an

input referred offset. This speciﬁcation actually lumps volt-

age offsets due to offset bias currents (IOS), and ampliﬁer

voltage offset into one speciﬁcation. To refer this speciﬁca-

tion to the output, you simply multiply the speciﬁcation

by the noise gain the LTC6601 is conﬁgured in:

VOSODIFF = 1 + Gain

where Gain is the closed loop gain in the particular ﬁlter

application:

Gain= R2

COMPONENT INPUT PIN PROTECTION

All of the LTC6601 pins with the exception of V+ and V– are

protected with steering diodes to either power supply. In

the event that a pin is driven beyond the supply rails, the

excess current should be limited to under 10mA to prevent

damage to the IC.

BIAS Pin

The LTC6601 has a BIAS pin (Pin 3) whose function is to

tailor both performance and power of the LTC6601. The

pin has a Thevenin equivalent impedance of approximately

150kΩ to a voltage source whose potential is 1.15V above

the V– supply. This pin has ﬁxed logic levels relative to V–

(see the Electrical Characteristics table), and can be driven

by an external source keeping in mind its equivalent input

impedance and equivalent input voltage. If the BIAS pin is

ﬂoated, care should be taken to control external leakage

currents to this pin to under 1μA to prevent putting the

LTC6601 an undesired state.

If BIAS is tied to the positive supply, the LTC6601 dif-

ferential ﬁlter will be in a fully active state conﬁgured for

highest performance (lowest noise and lowest distortion).

If the BIAS pin is ﬂoated or left unconnected, the LTC6601

ﬁlter will be in a fully active state, with ampliﬁer currents

reduced and performance scaled back to preserve power

consumption. If the BIAS pin is tied to the most negative

supply (V–), the LTC6601 will be placed into a low power

shutdown mode with ampliﬁer outputs disabled. In this

state, the LTC6601 draws approximately 450μA.

In low power shutdown, all internal biasing current sources

are shut off, and the output pins, OUT+ and OUT–, will each

appear as open collectors with a non-linear capacitor in

parallel and steering diodes to either supply. The turn-on

and turn-off time constant between states are on the order

of 0.4μs. Using this function to wire-OR outputs together

is not recommended.

General Design and Usage

As levels of integration have increased and correspond-

ingly, system supply voltages decreased, there has been

a need for ADCs to process signals differentially in order

to maintain good signal-to-noise ratios. These ADCs are

typically supplied from a single supply voltage which

can be as low as 3V (2.7V min), and will have an optimal

common mode input range near mid-supply. The LTC6601

makes interfacing to these ADCs easy, by providing anti-

alias ﬁltering, single-ended to differential conversion and

common mode level shifting (translation). Figure 3 shows

a general application of this. The low frequency gain to

VOUTDIFF from VIN is simply:

VOUTDIFF = VOUT+ –VOUT– ≈

•VINDIFF

The differential output voltage (VOUT+–VOUT–)iscompletely

independent of input and output common mode voltages,

or the voltage at the common mode pin. This makes the

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