LTC6602 datasheet(20/40 Pages) AD

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LTC6601-2

66012f

APPLICATIONS INFORMATION

Table 1 lists the ampliﬁer input referred noise for the

LTC6601-2. Tables 2 to10 list the noise referred to the input

pins of the IC for common conﬁgurations of the LTC6601-2.

To determine the spot noise at the output, simply multiply

the noise by the Gain = R2/R1. To estimate the integrated

noise at the output, multiply the noise by the gain, and the

square root of the noise bandwidth. The noise bandwidth

depends on the ﬁlter conﬁguration. For Figure 2, the noise

bandwidth is 100MHz, or approximately 7 times the ﬁlter

bandwidth. Improvements in SNR can be made by adding

an additional RC ﬁlter at the output to band limit wide band

noise before feeding ADCs. See the section “Interfacing

the LTC6601 to ADC Converters” for more detail.

Table 1. Ampliﬁer (Input Referred) Noise Characteristics for the

LTC6601-2

BIAS PIN PULLED TO V+

BIAS PIN FLOATING

eni

nV/√Hz

pA/√Hz

eni

nV/√Hz

pA/√Hz

4.7

5.2

2.1

LAYOUT CONSIDERATIONS

Because the LTC6601 is a very high speed ampliﬁer, it is

sensitive to both stray capacitance and stray inductance.

It is critical that close attention be paid to supply bypass-

ing. For single supply applications, it is recommended

that a high quality 0.1μF surface mount ceramic bypass

capacitor be placed between Pins 14 and 13 with direct

short connections. Pin 13 and the Exposed Pad, Pin 21,

should be tied directly to a low impedance ground plane

with minimal routing. For dual (split) power supplies, it

is recommended that an additional high quality, 0.1μF

ceramic capacitor be used to bypass pin V+ to ground

and V– to ground, again with minimal routing. For driv-

ing large differential loads (<200Ω), additional bypass

capacitance may be needed between V+ and V– for opti-

mal performance. Note that small geometry (e.g., 0603)

surface mount ceramic capacitors have a much higher

self resonant frequency than capacitors with leads, and

perform best in high speed applications.

The VOCM pin should be bypassed to ground with a high

quality ceramic capacitor whose value exceeds 0.01μF,

with direct, short connections. In split supply applications,

the VOCM pin can be either bypassed to ground or directly

hardwired to ground. Be careful not to violate the output

common mode range speciﬁcations for the VOCM pin.

Stray parasitic capacitances to unused component pins

that set up the ﬁlter’s characteristics, should be kept to an

absolute minimum. This prevents deviations from the ideal

frequency response. An ideal layout technique would be to

remove the solder pads for the unused component pins,

and strip away the ground plane underneath these pins to

lower capacitance to an absolute minimum. Floating unused

component pins which set up the ﬁlter characteristics will

not reduce the reliability of the LTC6601.

At the output, always keep in mind the differential nature of

the LTC6601, and that it is critical that the load impedances

seen by both outputs (stray or intended), should be as bal-

anced and symmetric as possible. This will help preserve

the natural balance of the LTC6601, which minimizes the

generation of even order harmonics and preserves the

rejection of common mode signals and noise.

–

66012 F05

eni2

eno2

enR32

enR22

enR12

In+2

In–2

Figure 5. Differential Noise Model of the LTC6601

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