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PSD413A2 Datasheet(PDF) 93 Page - STMicroelectronics |
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PSD413A2 Datasheet(HTML) 93 Page - STMicroelectronics |
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93 / 123 page ![]() PSD4XX Family 90 -20 -25 ZPLD_TURBO Symbol Parameter Conditions Min Max Min Max OFF * Unit Maximum Frequency External Feedback 1/(tSA + tCOA) 14.49 11.11 MHz Maximum Frequency 1/(tSA+tCOA–10) 16.95 12.50 MHz fMAXA Internal Feedback (fCNTA) (Note 1) Maximum Frequency Pipelined Data 1/(tCH + tCL) 31.25 18.52 MHz t SA Input Setup Time Any Input 13 30 Add 20 ns t HA Input Hold Time Any Input 13 30 0 ns t CHA Clock High Time Any Input 25 27 0 ns t CLA Clock Low Time Any Input 16 27 0 ns t COA Clock to Output Delay Any Input to Port B 56 60 Add 20 ns tARD Array Delay for Product Term Expansion Any Macrocell 33 35 0 ns tMINA Minimum Clock Period 1/fCNT 59 80 0 ns Asynchronous Clock Mode (3.0 V ± 10%, Note 1) AC/DC Parameters – ZPLD Timing Parameters (ZPSD4XXV Versions) (3.0 V ± 10%) NOTE: 1. Only Port B has asynchronous outputs. Clock into macrocell Flip Flop is generated by a product term. *If ZPLD_TURBO is off and the ZPLD is operating above 15 MHz, there is no need to add 20 ns to the timing parameters. |
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