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PSD413A2 Datasheet(PDF) 55 Page - STMicroelectronics |
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PSD413A2 Datasheet(HTML) 55 Page - STMicroelectronics |
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55 / 123 page ![]() PSD4XX Family 52 9.3.9.1 Control Register This register is used in both Standard MCU I/O Mode and Address Out modes. For setting a Standard MCU I/O Mode, a “1” must be written to the corresponding bit in the register. Writing a “0” to the register is required for the Address Out mode. The register has a default value of “0” after reset. 9.3.9.2 Direction Register This register is used to control the direction of data flow in the I/O Ports. Writing a “1” to the corresponding bit in the register configures the port to be an output port, and a “0” forces the port to be an input port. The I/O configuration of the port pins can be determined by reading the Direction Register. After reset, the pins are in input mode. 9.3.9.3 Open Drain This register determines whether the output pin driver of Ports C or D is a CMOS driver or an Open Drain driver. Writing a “0” to the register selects a CMOS driver, while a “1” selects an Open Drain driver. 9.3.9.4 PLD – I/O Register This is a read only status register. Reading a "1" indicates the corresponding pin is configured as a PLD pin. A "0" indicates the pin is an I/O pin. 9.3.9.5 Data In Register This register is used in the Standard MCU I/O Mode configuration to read the input pins. 9.3.9.6 Data Out Register This register holds the output data in the Standard MCU I/O Mode. The contents of the register can also be read. 9.3.9.7 Macrocell Out Register This register enables the user to read the outputs of the GPLD macrocell (PA, PB, and PE macrocells). 9.3.9.8 I/O Register Address Offset The I/O Register can be accessed by the microcontroller during normal read/write bus cycles. The address of a register is defined as: CSIOP + register address offset The CSIOP is the base address that is defined in the ABEL file and occupies a 256 byte space. The register address offset lies within this 256 byte space. Tables 16 and 16a are the address offset of the registers. The PSD4XX Architecture (cont.) |
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