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68HC05CL16 Datasheet(PDF) 39 Page - Motorola, Inc |
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68HC05CL16 Datasheet(HTML) 39 Page - Motorola, Inc |
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39 / 145 page  June 11, 1997 GENERAL RELEASE SPECIFICATION MC68HC05CL48 INTERRUPTS MOTOROLA REV 2.0 4-7 To prevent unwanted interrupts generated on KBI[3:7] pins. A logic ‘1’ should be written to these pins before setting their corresponding interrupt enable bits. Figure 4-3. Keyboard Interrupt Circuitry 4.3.2.3 External Interrupt Control Register (EXICR $001D) KBE[7:3] 1 = Enable Keyboard interrupt on PTA[7:3] respectively. 0 = Disable Keyboard interrupt on PTA[7:3] respectively. IRQE[2:0] 1 = Enable IRQ interrupt on PTA[2:0] respectively. 0 = Disable IRQ interrupt PTA[2:0] respectively. 76543210 EXICR $001D READ KBE7 KBE6 KBE5 KBE4 KBE3 IRQ2E IRQ1E IRQ0E WRITE RESET 00000000 VDD External pins PTA[3.7] Pad Logic Internal Data bits [3.7], Port A DDR(3-7) KBE[3.7] 100k KBI[3.7] |
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