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EM357-RTR Datasheet(PDF) 132 Page - List of Unclassifed Manufacturers

Part # EM357-RTR
Description  High-Performance, Integrated ZigBee/802.15.4 System-on-Chip
PDF  240 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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EM357-RTR Datasheet(HTML) 132 Page - List of Unclassifed Manufacturers

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EM351 / EM357
Figure 9-16. Control Circuit in External Clock Mode 2
9.3.4
Capture/Compare Channels
Each capture/compare channel is built around a capture/compare register including a shadow register, an
input stage for capture with digital filter, multiplexing and prescaler, and an output stage with comparator
and output control.
Figure 9-17 gives an overview of the input stage of one capture/compare channel. The input stage samples the
corresponding TIy input to generate a filtered signal (TIyF). Then an edge detector with polarity selection
generates a signal (TIyFPy) which can be used either as trigger input by the slave mode controller or as the
capture command. It is prescaled before the capture register (ICyPS).
Figure 9-17. Capture/Compare Channel (Example: Channel 1 Input Stage)
The output stage generates an intermediate reference signal, OCyREF, which is only used internally. OCyREF is
always active high, but it may be inverted to create the output signal, OCy, that controls a GPIO output.
Figure 9-18 shows the basic elements of a capture/compare channel.
9-12
120-035X-000D
Preliminary



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