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EM357-RTR Datasheet(PDF) 125 Page - List of Unclassifed Manufacturers |
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EM357-RTR Datasheet(HTML) 125 Page - List of Unclassifed Manufacturers |
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125 / 240 page  EM351 / EM357 but without setting the INT_TIMUIF flag. Thus no interrupt request is sent. This avoids generating both update and capture interrupts when clearing the counter on the capture event. When a UEV occurs, the update flag (the INT_TIMUIF bit in the INT_TIMxFLAG register) is set (unless TIM_USR is 1) and the following registers are updated: The buffer of the prescaler is reloaded with the buffer value (contents of the TIMx_PSC register). The auto-reload shadow register is updated with the buffer value (TIMx_ARR). Figure 9-3, Figure 9-4, Figure 9-5, and Figure 9-6 show some examples of the counter behavior for different clock frequencies when TIMx_ARR = 0x36. Figure 9-3. Counter Timing Diagram, Internal Clock Divided by 1 Figure 9-4. Counter Timing Diagram, Internal Clock Divided by 4 9-5 120-035X-000D Preliminary |
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