STLS2F01 datasheet(35/48 Pages) STMICROELECTRONICS

35 / 48 page

STLS2F01

Initialization process

35/48

Initialization process

The initialization of STLS2F01 is divided into core part and interface part.

When STLS2F01 PCI interface is configured as main bridge, interface initialization is

finished internally. And PCI_RESETn is output signal. When the processor works as

PCI/PCI-X devices used in other system, PCI_RESETn acts as input to reset the PCI

interface of STLS2F01.

When processor reset signal SYSRESETn is low, related clock, test signals and initial

signals must be valid.

●

SYSCLK, MEMCLK, CLKSEL and PCI_CLK must be stable

●

Initial signal PCI_CONFIG should set to appropriate value

●

TEST_CTRL[7:0] are all high

When SYSRESETn is invalid, the processor internal reset logic begins to work to initialize

the chip. The SYSRESETn should be valid at least one clock cycle to ensure it can be

sampled by reset logic.

The work-mode of PCI bus is decided by main bridge during reset period. As such,

PCI_RESETn output generated by processor when it works as main bridge will be used to

ensure all devices working at the same mode. When not in main bridge mode,

PCI_RESETn input will be used to receive bus configuration.

STLS2F01 Datasheet(PDF) 35 Page - STMicroelectronics