 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
WM9713 Datasheet(PDF) 86 Page - Wolfson Microelectronics plc |
|
|
|||||||||||||||||||||||||||||
WM9713 Datasheet(HTML) 86 Page - Wolfson Microelectronics plc |
|
|
86 / 111 page  WM9713L Preliminary Technical Data 1 PTD, March 2004, Rev 2.2 86 AC-LINK POWERDOWN SYNC BITCLK SDATAOUT WRITE TO 0X20 DATA PR4 DON'T CARE SDATAIN SLOT 1 SLOT 2 t S2_PDOWN Figure 31 AC-Link Powerdown Timing AC-Link powerdown occurs when PR4 (register 26h, bit 12) is set (see “Power Management” section). PARAMETER SYMBOL MIN TYP MAX UNIT End of Slot 2 to BITCLK and SDATAIN low tS2_PDOWN 1.0 µs COLD RESET (ASYNCHRONOUS, RESETS REGISTER SETTINGS) RESETB BITCLK t RST_LOW t RST2CLK Figure 32 Cold Reset Timing Note: For correct operation SDATAOUT and SYNC must be held LOW for entire RESETB active low period otherwise the device may enter test mode. See AC'97 specification or Wolfson applications note WAN104 for more details. PARAMETER SYMBOL MIN TYP MAX UNIT RESETB active low pulse width tRST_LOW 1.0 µs RESETB inactive to BITCLK startup delay tRST2CLK 162.8 ns |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Indian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
