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WM9713 Datasheet(PDF) 96 Page - Wolfson Microelectronics plc |
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WM9713 Datasheet(HTML) 96 Page - Wolfson Microelectronics plc |
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96 / 111 page ![]() WM9713L Preliminary Technical Data 1 PTD, March 2004, Rev 2.2 96 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 15 PD15 1 (OFF) Touchpanel / PenADC power down 14 VMID1M 1 (OFF) Disables 1Meg Vmid resistor string 13 TSHUT 1 (OFF) Disables thermal shutdown 12 VXDAC 1 (OFF) Disables VXDAC 11 AUXDAC 1 (OFF) Disables AUXDAC 10 VREF 1 (OFF) Disables reference generator 9 PLL 1 (OFF) Disables PLL 7 DACL 1 (OFF) Disables left DAC 6 DACR 1 (OFF) Disables right DAC 5 ADCL 1 (OFF) Disables left ADC 4 ADCR 1 (OFF) Disables right ADC 3 HPLX 1 (OFF) Disables left headphone mixer 2 HPRX 1 (OFF) Disables right headphone mixer 1 SPKX 1 (OFF) Disables speaker mixer 3Ch 0 MX 1 (OFF) Disables mono mixer Power Management * “0” corresponds to “ON”, if and only if the corresponding bit in register 26h is also 0. Register 3Ch is for power management additional to the AC’97 specification. Note that the actual state of each circuit block depends on both register 3Ch AND register 26h. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 15 MCD 1 (OFF) Disables microphone current detect 14 MICBIAS 1 (OFF) Disables microphone bias 13 MONO 1 (OFF) Disables MONO output PGA 12 OUT4 1 (OFF) Disables OUT4 output PGA 11 OUT3 1 (OFF) Disables OUT3 output PGA 10 HPL 1 (OFF) Disables HPL output PGA 9 HPR 1 (OFF) Disables HPR output PGA 8 SPKL 1 (OFF) Disables SPKL output PGA 7 SPKR 1 (OFF) Disables SPKR output PGA 6 LL 1 (OFF) Disables LINEL PGA 5 LR 1 (OFF) Disables LINER PGA 4 MOIN 1 (OFF) Disables MONOIN PGA 3 MA 1 (OFF) Disables mic PGA MA 2 MB 1 (OFF) Disables mic PGA MB 1 MPA 1 (OFF) Disables mic pre-amp MPA 3Eh 0 MPB 1 (OFF) Disables mic pre-amp MPB Power Management * “0” corresponds to “ON”, if and only if the corresponding bit in register 26h is also 0. Register 3Eh is for power management additional to the AC’97 specification. Note that the actual state of each circuit block depends on both register 3Eh AND register 26h. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 13 3DE 0 (OFF) Enables 3D enhancement Audio DACs, 3D Stereo Enhancement 40h 7 LB 0 (OFF) Enables loopback (i.e. feed ADC output data directly into DAC) Intel’s AC’97 Component Specification, Revision 2.2, page 55 Register 40h is a “general purpose” register as defined by the AC’97 specification. Only two bits are implemented in the WM9713L. |
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