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WM9713 Datasheet(PDF) 11 Page - Wolfson Microelectronics plc |
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WM9713 Datasheet(HTML) 11 Page - Wolfson Microelectronics plc |
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11 / 111 page ![]() Preliminary Technical Data WM9713L 1 PTD, March 2004, Rev 2.2 11 DIGITAL INTERFACE CHARACTERISTICS Test Conditions DBVDD = 3.3V, DCVDD = 3.3V, TA = +25 oC, unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Digital Logic Levels (all digital input or output pins) – CMOS Levels Input HIGH level VIH DBVDD ×0.7 V Input LOW level VIL DBVDD ×0.3 V Output HIGH level VOH source current = 2mA DBVDD ×0.9 Output LOW level VOL sink current = 2mA DBVDD ×0.1 Clock Frequency Master clock (MCLKA pin) 24.576 MHz AC’97 bit clock (BIT_CLK pin) 12.288 MHz AC’97 sync pulse (SYNC pin) 48 kHz Note: 1. All audio and non-audio sample rates and other timing scales proportionately with the master clock. 2. For signal timing on the AC-Link, please refer to the AC’97 specification (Revision 2.2) |
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