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ADRF6720-27ACPZ-R7 Datasheet(PDF) 25 Page - Analog Devices |
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ADRF6720-27ACPZ-R7 Datasheet(HTML) 25 Page - Analog Devices |
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25 / 44 page ![]() ADRF6720-27 Data Sheet Rev. B | Page 24 of 43 BASEBAND INPUTS Drive the four I and Q inputs with an external bias level of 2.68 V. These inputs are generally dc-coupled to the outputs of a dual DAC. The nominal drive level used in the characterization of the ADRF6720-27 is 1 V p-p differential (or 500 mV p-p on each pin). LO INPUT The external LO input is designed to be driven differentially. AC couple both sides of the differential LO source through a pair of series capacitors to the LOIN+ and LOIN− pins. The typical LO drive level, used for the characterization of the ADRF6720-27, is 0 dBm. Apply the reference frequency for the PLL (between 5.7 MHz and 320 MHz) to the REFIN pin, which is ac-coupled. If the REFIN pin is being driven from a 50 Ω source, terminate the pin with 50 Ω as shown in Figure 44. Apply a drive level of about 4 dBm to 14 dBm; 4 dBm is used at characterization. LOOP FILTER The loop filter in Figure 44 is connected between the CP and VTUNE pins. The recommended components for 20 kHz filter designs are shown in Table 8. RF OUTPUT The RF output is available at the RFOUT pin (Pin 24), which can drive a 50 Ω load. |
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