VS1103B datasheet(42/61 Pages) ETC2

42 / 61 page

VLSI

Solution

VS1103b

VS1103B

7. OPERATION

7.5 SPI Boot

If GPIO0 is set with a pull-up resistor to 1 at boot time, VS1103b tries to boot from external SPI memory.

SPI boot redeﬁnes the following pins:

Normal Mode

SPI Boot Mode

GPIO0

xCS

GPIO1

CLK

DREQ

MOSI

GPIO2

MISO

The memory has to be an SPI Bus Serial EEPROM with 16-bit addresses (i.e. at least 1 KiB). The serial

speed used by VS1103b is 245 kHz with the nominal 12.288 MHz clock. The ﬁrst three bytes in the

memory have to be 0x50, 0x26, 0x48. The exact record format is explained in the Application Notes for

VS10XX.

7.6 Play/Decode

This is the normal operation mode of VS1103b. MIDI and ADPCM are decoded, mixed and converted

to analog domain by the internal DAC.

When there is no input for decoding, VS1103b goes into idle mode (lower power consumption than

during decoding) and actively monitors the serial data input for valid data.

All different formats can be played back-to-back without software resets in-between. Send at least 4

zeros after each stream.

7.7 Feeding PCM data

VS1103b can be used as a PCM decoder by sending to it a WAV ﬁle header. If the length sent in the WAV

ﬁle is 0xFFFFFFFF, VS1103b will stay in PCM mode for a long time (or until SARC OUTOFADPCM

has been set). 8-bit linear and 16-bit linear audio is supported in mono or stereo.

7.8 SDI Tests

There are several test modes in VS1103b, which allow the user to perform memory tests, SCI bus tests,

and several different sine wave tests.

All tests are started in a similar way: VS1103b is hardware reset, SM TESTS is set, and then a test

command is sent to the SDI bus. Each test is started by sending a 4-byte special command sequence,

followed by 4 zeros. The sequences are described below.

Version 1.01, 2007-09-03

VS1103B Datasheet(PDF) 42 Page - List of Unclassifed Manufacturers