M32CSLASH8B datasheet(396/406 Pages) RENESAS

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Under development

M32C/8B Group

25. Usage Notes

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 379 of 385

• If an A/D conversion in progress is forcibly aborted by setting the ADST bit in the AD0CON0 register to 0

(A/D conversion stops), the A/D conversion result will be incorrect. The AD0j (j = 0 to 7) register which is not

performing A/D conversion may also be incorrect. If the ADST bit is set to 0 during A/D conversion, do not

use values obtained from any of AD0j registers.

• When using DMAC operating mode in single sweep mode, repeat sweep mode 0, repeat sweep mode 1, multi-

port single sweep mode, or multi-port repeat sweep mode 0, do not input an external retrigger or hardware

retrigger. If a retrigger is input, the sequence of A/D conversions in progress is aborted and starts over from the

ANi_0 pin (i = none, 0, 2, 15). As a result, a pin and the conversion result of the pin transferred to the RAM do

not correspond to each other.

Do not read the AD00 register using instructions.

• To abort an A/D conversion in progress by setting the ADST bit in the AD0CON0 register to 0 in single sweep

mode, disable interrupts before setting the ADST bit to 0.

(Technical update: TN-16C-132A/EA)

M32C/8B Datasheet(PDF) 396 Page - Renesas Technology Corp