LPC55S6X datasheet(36/128 Pages) NXP

36 / 128 page

LPC55S6x

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Product data sheet

Rev. 1.9 — 10 February 2020

36 of 128

NXP Semiconductors

LPC55S6x

32-bit ARM Cortex-M33 microcontroller

PIO1_30/

WAKEUP

-F9

[2][8]

ZI/O 0 PIO1_30 — General-purpose digital input/output pin.

This pin can trigger a wake-up from deep power-down mode.

WAKEUP pin can be configured as rising or falling edge.

I/O 1 FC7_TXD_SCL_MISO_WS — Flexcomm 7: USART

transmitter, I2C clock, SPI master-in/slave-out data I/O, I2S

word-select/frame.

I/O 2 SD0_D[7] — SD/MMC 0 data 7.

I3 SCT0_GPI7 — Pin input 7 to SCTimer/PWM.

I4 USB1_OVERCURRENTN — USB1 bus overcurrent

indicator (active low).

O5 USB1_LEDN — USB1-configured LED indicator (active

low).

6 R — Reserved.

I7 PLU_INPUT1 — PLU input 1.

PIO1_31

[2]

ZI/O 0 PIO1_31 — General-purpose digital input/output pin.

I/O 1 MCLK — MCLK input or output for I2S.

O2 SD1_CLK — SD/MMC 1 card clock.

O3 CTIMER0_MAT2 — 32-bit CTimer0 match output 2.

O4 SCT0_OUT6 — SCTimer/PWM output 6.

5 R — Reserved.

6 R — Reserved.

I7 PLU_INPUT0 — PLU input 0.

8 R — Reserved.

Feedback node (regulated output) of DCDC converter.

N11

DCDC converter power stage output.

RESETN

[5]

External reset input: A LOW on this pin resets the device,

causing I/O ports and peripherals to take on their default

states, and the boot code to execute. Wakes up the part from

deep power-down mode.

USB0_3V3

USB0 analog 3.3 V supply.

USB0_DM

[6][8]

I/O

USB0 bidirectional D- line.

USB0_DP

[6][8]

I/O

USB0 bidirectional D+ line.

USB0_VSS

USB0 analog 3.3 V ground.

USB1_DM

[6][8]

I/O

USB1 bidirectional D- line.

USB1_DP

[6][8]

I/O

USB1 bidirectional D+ line.

USB1_VBUS 25

[6][8]

VBUS pin (power on USB cable).

USB1_3V3

[10]

USB1 analog 3.3 V supply.

USB1_VSS

22;26

33; 37

USB1 analog 3.3 V ground.

VBAT_DCDC 32

N13

49, 50

[9]

Supply of DCDC output stage. DCDC core supply

(references and regulation stages).

Table 3.

Pin description …continued

Symbol

Description

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