LPC55S6X datasheet(9/128 Pages) NXP

9 / 128 page

LPC55S6x

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Product data sheet

Rev. 1.9 — 10 February 2020

9 of 128

NXP Semiconductors

LPC55S6x

32-bit ARM Cortex-M33 microcontroller

6. Pinning information

6.1 Pin description

Table 4 shows the pin functions available on each pin, and for each package. These

functions are selectable using the IOCON control registers.

Some functions, such as ADC or comparator inputs, are available only on specific pins

when digital functions are disabled on those pins. By default, the GPIO function is

selected except on pins PIO0_11 an PIO0_12, which are the serial wire debug pins. This

allows debug to operate through reset.

All pins have all pull-ups, pull-downs, and inputs turned off at reset except PIO0_2,

PIO0_5, PIO0_11, PIO0_12, PIO0_13 and PIO0_14 pins. This prevents power loss

through pins prior to software configuration. Due to special pin functions, some pins have

a different reset configuration. PIO0_5 and PIO0_12 pins have internal pull-up enabled by

default, and PIO0_2 and PIO0_11 have internal pull-down enabled by default. PIO0_13

and PIO0_14 are true open drain pins. Refer to pin description table for default reset

configuration.

The state of port pin PIO0_5 at Reset determines the boot source of the part or if the

handler is invoked.

The external reset pin or 3 wake-up pins can trigger a wake-up from deep power-down

mode. For the wake-up pins, do not assign any function to this pin if it will be used as a

wake-up input when using deep power-down mode. If not in deep power-down mode, a

function can be assigned to this pin. If the pin is used for wake-up, it should be pulled

HIGH externally before entering deep power-down mode. A LOW-going pulse as short as

50 ns causes the chip to exit deep power-down mode wakes up the part.

The JTAG functions TRST, TCK, TMS, TDI, and TDO, are selected on pins PIO0_2 to

PIO0_6 by hardware when the part is in boundary scan mode. The JTAG functions cannot

be used for debug mode.

LPC55S6X Datasheet(PDF) 9 Page - NXP Semiconductors