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TUSB3410 Datasheet(PDF) 21 Page - Texas Instruments |
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TUSB3410 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 92 page  4–1 4 MCU Memory Map (Internal Operation) Figure 4–1 illustrates the MCU memory map under boot and normal operation. For more information regarding the integrated 8052, see the TUSBxxxx Microcontroller Reference Guide (SLLU044). NOTE: The internal 256 bytes of RAM are not shown, since they are assumed to be in the standard 8052 location (0000 to 00FF). The shaded areas represent the internal ROM/RAM. When SDW bit = 0 (boot mode): The 10K ROM is mapped to address (0x0000–0x27FF) and is duplicated in location (0x8000–0xA7FF) in code space. The internal 16K RAM is mapped to address range (0x0000–0x3FFF) in data space. Buffers, MMR, and I/O are mapped to address range (0xF800–0xFFFF) in data space. When SDW bit = 1 (normal mode): The 10K ROM is mapped to (0x8000–0xA7FF) in code space. The internal 166K RAM is mapped to address range (0x0000–0x3FFFF) in code space. Buffers, MMR, and I/O are mapped to address range (0xF800–0xFFFF) in data space. Normal Mode (SDW = 1) 0000 CODE XDATA 16K Code RAM Read Only 2K Data MMR 10K Boot ROM Boot Mode (SDW = 0) CODE XDATA 10K Boot ROM 2K Data MMR 10K Boot ROM (16K) Read/Write 27FF 3FFF 8000 A7FF F800 FF7F FF80 FFFF Figure 4–1. MCU Memory Map |
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