TBD datasheet(45/80 Pages) FREESCALE

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Electrical Characteristics

MSC8144E Quad Core Digital Signal Processor Data Sheet, Rev. 6

Freescale Semiconductor

2.7.5.5

Receiver Specifications

LP-Serial receiver electrical and timing specifications are stated in the text and tables of this section. Receiver input impedance

shall result in a differential return loss better that 10 dB and a common mode return loss better than 6 dB from 100 MHz to 0.8

× baud frequency. This includes contributions from internal circuitry, the package, and any external components related to the

receiver. AC coupling components are included in this requirement. The reference impedance for return loss measurements is

100

Ω resistive for differential return loss and 25 Ω resistive for common mode.

Figure 13. Transmitter Output Compliance Mask

Table 36. Transmitter Differential Output Eye Diagram Parameters

Transmitter Type

VDIFFmin (mV)

VDIFFmax (mV)

A (UI)

B (UI)

1.25 GBaud short range

250

500

0.175

0.39

1.25 GBaud long range

400

800

0.175

0.39

2.5 GBaud short range

250

500

0.175

0.39

2.5 GBaud long range

400

800

0.175

0.39

3.125 GBaud short range

250

500

0.175

0.39

3.125 GBaud long range

400

800

0.175

0.39

Table 37. Receiver AC Timing Specifications—1.25 GBaud

Characteristic

Symbol

Range

Unit

Notes

Min

Max

Differential Input Voltage

VIN

200

1600

mVPP

Measured at receiver

Deterministic Jitter Tolerance

0.37

UIPP

Measured at receiver

Combined Deterministic and Random

Jitter Tolerance

JDR

0.55

UIPP

Measured at receiver

VDIFF min

VDIFF max

-VDIFF min

-VDIFF max

1-B

Time in UI

A1-A

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