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S2-LPS Datasheet(PDF) 39 Page - STMicroelectronics |
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S2-LPS Datasheet(HTML) 39 Page - STMicroelectronics |
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39 / 73 page ![]() • Sync: the pattern that identify the start of the frame can be configured in value with a programmable length from 0 to 32 bits, in steps of 1-bit length. The setting is done by the register SYNC_LENGTH. The S2LP supports dual synchronization with a either a primary or a secondary synchronization word. The binary content of the primary SYNC word is programmable through registers SYNCx (x= 0, 1, 2, 3). The binary content of the secondary SYNC word is programmable through registers SEC_SYNCx (x= 0, 1, 2, 3), note that such registers are in alternate use with address filtering registers. On the transmitter side either the primary or the secondary word is transmitted according to the value of the SECONDARY_SYNC_SEL register, in particular if SECONDARY_SYNC_SEL = 0 then the primary synchronization word is transmitted; if SECONDARY_SYNC_SEL = 1 then the secondary synchronization word is transmitted. On the receiver side, the primary synchronization word is always enabled. The search for the secondary synchronization word can be enabled setting SECONDARY_SYNC_SEL = 1b. In this case, both the binary patterns are searched for and both of them can trigger the start of payload demodulation. The SQI[5:0] value reported in the LINQ_QUALIF register is the maximum between the SQI of the primary and secondary words. The bit SQI[6] indicates which synchronization word has been detected: in particular, if the secondary synchronization word has been detected then the SQI[6] = 1b otherwise if the primary synchronization word has been detected then SQI[6] = 0b. The binary pattern programmed in SYNCx (or SEC_SYNCx) is transmitted on air starting with the most significant bit of x = 1, to the least significant bit of x = 4 according to the programmed synchronization word length. • Length: The device supports both fixed and variable packet length transmission from 0 to 65535 bytes. On the transmitting device, the packet length is always set by using the two registers PCKTLENx (x= 1, 2) as: PCKTLEN1 × 256 + PCKTLEN0. On the receiving device, if FIX_VAR_LEN register is set to ‘1’, the packet length is directly extracted from the field Length of the received packet itself. If the register FIX_VAR_LEN = 0b the Length field of the received packet is not used, because is already known from the registers PCKTLENx (x= 1, 2) as for the transmitter. For the basic and stack packet formats, the number of address bytes is also counted in the packet length value. CRC is excluded. Furthermore, when variable packet length is used (FIX_VAR_LEN=1b), the width of the binary field transmitted, must be configured through the LEN_WID register in the following way: – If the packet length is from 0 to 255 bytes (payload + address field), then LEN_WID = 0b (1 byte length field transmitted). – If the packet length is from 0 to 65535 bytes (payload + address field), then LEN_WID = 1b (2 bytes length field transmitted). • Destination address: can be enabled or no by the register ADDRESS_LEN. If enabled, ADDRESS_LEN=1b, its size is 1 byte. The destination address field is read from the register RX_SOURCE_ADDR (TX only). The receiver uses this field to perform automatic filtering on its value programmed in TX_SOURCE_ADDR (RX only). • Payload: the main data from transmitter with a max length up to 65535 supported by the embedded automatic packet handler. • CRC: can optionally be calculated on the transmitted data (Length field, Address field and Payload) and appended at the end of the payload (see Section 6.5.1 CRC). • Postamble: The packet postamble allows inserting a certain number of ‘01’ bit pairs at the end of the data packet. The number of postamble bit pairs can be set through the MBUS_PSTMBL register. 6.2 UART over the air packet format Table 46. UART over the air packet format Preamble Sync Payload 0:2046 bits 0:32 bits 0:65535 bytes When this format is selected, a start bit and a stop bit can be programmed to be added to each byte of the TX FIFO. Such start and stop bits are automatically removed from the received payload before written to the RX FIFO. Start and stop bits are not added to the SYNC word. Also, the BYTE_SWAP bit can be set in order to send the FIFO bytes in LSbit first (default is indeed MSbit first). The actual binary value of the start and stop bit can be set through the START_BIT and the STOP_BIT fields of the PCKTCTRL2 register. S2-LPS UART over the air packet format DS13831 - Rev 1 page 39/73 |
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