AN2014 datasheet(55/65 Pages) STMICROELECTRONICS

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AN2014

Power supply loss and application reset

Figure 44. Emergency sequence I2C products

Note:

This emergency sequence is detailed in the AN1471.

After the emergency sequence, the power supply of the EEPROM (through keep alive

systems or a backup capacitor at the EEPROM level) should remain high enough to allow

an eventual engaged write cycle to end correctly (tW = 5 ms).

SPI products (1 Kbit to 4 Kbit)

Emergency procedure to interrupt an SPI request:

•

Drive the W pin Low while the device is selected. One clock pulse will reset the WEL bit

in the Status Register (any current write request will be ignored).

•

Deselect the EEPROM by driving the S pin High.

Warning:

If the SPI device is deselected between two data bytes of a

write request and W has not been driven Low, a write cycle

may be triggered.

SPI products (8 Kbit and larger)

Emergency procedure to interrupt a SPI request:

•

drive W pin low while device is selected. Only the WRSR instruction will be ignored, the

execution of a Write (to memory) is not discarded by the W pin for 8 Kbit products and

larger.

•

Deselect the EEPROM driving S pin High.

Warning:

If the chip is deselected between two data bytes of a write

request, a write cycle may be triggered.

AN2014 Datasheet(PDF) 55 Page - STMicroelectronics