CY8C53_11 datasheet(69/106 Pages) CYPRESS

69 / 106 page

PRELIMINARY

PSoC® 5: CY8C53 Family Datasheet

Document Number: 001-66237 Rev. *A

Page 69 of 106

Figure 11-15. USBIO Output Rise and Fall Times, GPIO Mode,

VDDD = 3.3 V, 25 pF Load

Table 11-14. USBIO AC Specifications

Parameter

Description

Conditions

Min

Typ

Max

Units

Tdrate

Full-speed data rate average bit rate

12 – 0.25%

12 +

0.25%

MHz

Tjr1

Receiver data jitter tolerance to next

transition

–8

–

Tjr2

Receiver data jitter tolerance to pair

transition

–5

–

Tdj1

Driver differential jitter to next transition

–3.5

–

3.5

Tdj2

Driver differential jitter to pair transition

–4

–

Tfdeop

Source jitter for differential transition to

SE0 transition

–2

–

Tfeopt

Source SE0 interval of EOP

160

–

175

Tfeopr

Receiver SE0 interval of EOP

–

Tfst

Width of SE0 interval during differential

transition

–

Fgpio_out

GPIO mode output operating frequency 3 V

≤ V

DDD ≤ 5.5 V

–

MHz

VDDD = 2.7 V

–

MHz

Tr_gpio

Rise time, GPIO mode, 10%/90% VDDD VDDD > 3 V, 25 pF load

–

VDDD = 2.7 V, 25 pF load

–

Tf_gpio

Fall time, GPIO mode, 90%/10% VDDD VDDD > 3 V, 25 pF load

–

VDDD = 2.7 V, 25 pF load

–

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