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EM342-RTR Datasheet(PDF) 72 Page - Silicon Laboratories

Part # EM342-RTR
Description  High-Performance, Integrated RF4CE System-on-Chip
PDF  143 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

EM342-RTR Datasheet(HTML) 72 Page - Silicon Laboratories

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EM342
72
Rev 1.0
INT_SC1CFG: Address: 0x4000A848 Reset: 0x0
Register 8.3. INT_SC1CFG: Serial Controller 1 Interrupt Configuration Register
Bit
31
30
29
28
27
26
25
24
Name
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Name
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Name
0
INT_
SC1PARERR
INT_
SC1FRMERR
INT_
SCTXULDB
INT_
SCTXULDA
INT_
SCRXULDB
INT_
SCRXULDA
0
Bit
7
6
5
4
3
2
1
0
Name
0
0
0
INT_
SCTXUND
INT_
SCRXOVF
INT_
SCTXIDLE
INT_
SCTXFREE
INT_
SCRXVAL
Bitname
Bitfield
Access
Description
INT_SC1PARERR
[14]
RW
Parity error received (UART) interrupt enable.
INT_SC1FRMERR
[13]
RW
Frame error received (UART) interrupt enable.
INT_SCTXULDB
[12]
RW
DMA transmit buffer B unloaded interrupt enable.
INT_SCTXULDA
[11]
RW
DMA transmit buffer A unloaded interrupt enable.
INT_SCRXULDB
[10]
RW
DMA receive buffer B unloaded interrupt enable.
INT_SCRXULDA
[9]
RW
DMA receive buffer A unloaded interrupt enable.
INT_SCTXUND
[4]
RW
Transmit buffer underrun interrupt enable.
INT_SCRXOVF
[3]
RW
Receive buffer overrun interrupt enable.
INT_SCTXIDLE
[2]
RW
Transmitter idle interrupt enable.
INT_SCTXFREE
[1]
RW
Transmit buffer free interrupt enable.
INT_SCRXVAL
[0]
RW
Receive buffer has data interrupt enable.



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