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EM342-RTR Datasheet(PDF) 91 Page - Silicon Laboratories

Part # EM342-RTR
Description  High-Performance, Integrated RF4CE System-on-Chip
PDF  143 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

EM342-RTR Datasheet(HTML) 91 Page - Silicon Laboratories

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EM342
Rev 1.0
91
SC1_TXENDB: Address: 0x4000C81C Reset: 0x20000000
SC1_TXCNT: Address: 0x4000C828 Reset: 0x0
Register 8.18. SC1_TXENDB: Transmit DMA End Address Register B
Bit
31
30
29
28
27
26
25
24
Name
0
0
1
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Name
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Name
0
0
SC_TXENDB
Bit
7
6
5
4
3
2
1
0
Name
SC_TXENDB
Bitname
Bitfield Access
Description
SC_TXENDB
[13:0]
RW
Address of the last byte that will be read from the DMA transmit buffer B.
Register 8.19. SC1_TXCNT: Transmit DMA Count Register
Bit
31
30
29
28
27
26
25
24
Name
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Name
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
Name
0
0
SC_TXCNT
Bit
7
6
5
4
3
2
1
0
Name
SC_TXCNT
Bitname
Bitfield Access
Description
SC_TXCNT
[13:0]
R
The offset from the start of the active DMA transmit buffer from which the next
byte will be read. This register is set to zero when the buffer is loaded and
when the DMA is reset.



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