EM342-RTR datasheet(74/143 Pages) SILABS

74 / 143 page

EM342

Rev 1.0

8.3. SPI—Slave Mode

The SC1 controller includes an SPI slave controller with these features:



Full duplex operation



Up to 5 Mbps data transfer rate



Programmable clock polarity and clock phase



Selectable data shift direction (either LSB or MSB first)



Slave select input

8.3.1. GPIO Usage

The SPI slave controller uses four signals:



MOSI (Master Out, Slave In) - inputs serial data from the master



MISO (Master In, Slave Out) - outputs serial data to the master



SCLK (Serial Clock) - clocks data transfers on MOSI and MISO



nSSEL (Slave Select) - enables serial communication with the slave

Note: The SPI slave controller does not tri-state the MISO signal when slave select is deasserted.

The GPIO pins that can be assigned to these signals are shown in Table 8.2.

Table 8.2. SPI Slave GPIO Usage

MOSI

MISO

SCLK

nSSEL

Direction

Input

Output

Input

GPIO Configuration

Input

Alternate Output

(push-pull)

Input

SC1 pin

PB2

PB1

PB3

PB4

EM342-RTR Datasheet(PDF) 74 Page - Silicon Laboratories

EM342-RTR Datasheet(HTML) 74 Page - Silicon Laboratories

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL