Electronic Components Datasheet Search
  Indian  ▼
ALLDATASHEET.IN

X  

PC87373 Datasheet(PDF) 69 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # PC87373
Description  LPC SuperI/O with Glue Functions
PDF  174 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87373 Datasheet(HTML) 69 Page - National Semiconductor (TI)

Back Button PC87373 Datasheet HTML 65Page - National Semiconductor (TI) PC87373 Datasheet HTML 66Page - National Semiconductor (TI) PC87373 Datasheet HTML 67Page - National Semiconductor (TI) PC87373 Datasheet HTML 68Page - National Semiconductor (TI) PC87373 Datasheet HTML 69Page - National Semiconductor (TI) PC87373 Datasheet HTML 70Page - National Semiconductor (TI) PC87373 Datasheet HTML 71Page - National Semiconductor (TI) PC87373 Datasheet HTML 72Page - National Semiconductor (TI) PC87373 Datasheet HTML 73Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 69 / 174 page
background image
3.0 Device Architecture and Configuration (Continued)
69
www.national.com
Revision 1.1
3.15.4 Fan Speed Control and Monitor Configuration Register 2 (FSCMCF2)
This register is reset by hardware to 00h.
Power Well: VDD3
Location:
Index F1h
Type:
Varies per bit
1
R/W or
RO
FANMON_EN1 (Fan Monitor Enable 1). When this bit is set to 1, the Fan Speed Monitor 1 is enabled
and the rate of pulses received at the FANTACH1 tachometer input is measured.
0: Disabled (default)
1: Enabled
0
R/W or
RO
TRI-STATE Control. When this bit is set to 1 and the logical device is inactive, the logical device output
pins are in TRI-STATE (see Section 3.3.2 on page 41).
0: Normal outputs (default)
1: TRI-STATE outputs when the logical device is inactive
Bit
76543210
Name
Reserved
FANCTL
_INV3
FANCTL
_EN3
FANMON
_EN3
Reserved
Reset
00000000
Bit
Type
Description
7-4
-
Reserved.
3
R/W or
RO
FANCTL_INV3 (Fan Control Output Invert 3). When this bit is set to 1, the signal at the FANPWM3
control output is inverted (pin GPIOE5/FANPWM3).
0: Normal signal at FANPWM3 (default)
1: Inverted signal at FANPWM3
2
R/W or
RO
FANCTL_EN3 (Fan Control Enable 3). When this bit is set to 1, the Fan Speed Controller 3 is enabled
and a PWM signal is generated at the FANPWM3 control output (pin GPIOE5/FANPWM3).
0: Disabled (default)
1: Enabled
1
R/W or
RO
FANMON_EN3 (Fan Monitor Enable 3). When this bit is set to 1, the Fan Speed Monitor 3 is enabled
and the rate of pulses, received at the FANTACH3 tachometer input, is measured.
0: Disabled (default)
1: Enabled
0-
Reserved.
Bit
Type
Description



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com