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AD9689-2000EBZ Datasheet(PDF) 81 Page - Analog Devices

Part # AD9689-2000EBZ
Description  Dual Analog-to-Digital Converter
PDF  134 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9689-2000EBZ Datasheet(HTML) 81 Page - Analog Devices

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Data Sheet
AD9689
Rev. A | Page 81 of 134
Example 1—Full Bandwidth Mode
JESD204B
LINK
(L = 8,
M = 2,
F = 1,
S = 2,
N´ = 16,
N = 16,
CS = 0,
HD = 1)
L0
M0S0[15:8]
M0S0[7:0]
M0S1[15:8]
M0S1[7:0]
M1S0[15:8]
M1S0[7:0]
M1S1[15:8]
M1S1[7:0]
L1
L2
L3
L4
L5
L6
L7
VIN_A
REAL
I = REAL COMPONENT
Q = QUADRATURE COMPONENT
DCM = DECIMATION
C2R = COMPLEX TO REAL
MX = VIRTUAL CONVERTER X
LY = LANE Y
SZ = SAMPLE Z INSIDE A JESD204B FRAME
C = CONTROL BIT (OVERRANGE, AMONG OTHERS)
T = TAIL BIT
VIN_B
REAL
M0
SYNC~
2560MSPS
12.8Gbps/LANE
F = 1
M1
14-BIT
ADC
CORE
14-BIT
ADC
CORE
Figure 141. Full Bandwidth Mode
The AD9689 is set up as shown in Figure 141, with the following
configurations:
•
Two 14-bit converters at 2.56 GSPS.
•
Full bandwidth application layer mode.
•
Decimation filters bypassed.
The JESD204B output configuration is as follows:
•
Two virtual converters required (see Table 33).
•
Output sample rate (fOUT) = 2560/1 = 2560 MSPS.
The JESD204B supported output configurations are as follows
(see Table 33):
•
N΄ = 16 bits.
•
N = 14 bits.
•
L = 8, M = 2, and F = 1, or L = 8, M = 2, and F = 2.
•
CS = 0.
•
K = 32.
•
Output serial lane rate = 12.8 Gbps per lane.
•
The PLL control register, Register 0x056E, is set to 0x00.
Set up the AD9689 in this mode using the following sequence:
1. Write 0x81 to Register 0x0000 (SPI soft reset).
2. Wait 5 ms to 10 ms.
3. Write 0x00 to Register 0x0200 (full bandwidth mode).
4. Write 0x00 to Register 0x0201 (chip decimation ratio = 1).
5. Write 0x15 to Register 0x0571 (JESD204B link power-
down).
6. Write 0x87 to Register 0x058B (scrambling enabled, L = 8).
7. Write 0x01 to Register 0x058E (M = 2).
8. Write0x00 to Register 0x058C (F = 1).
9. Write 0x00 to Register 0x056E (lane rate = 6.75 Gbps to
13.5 Gbps).
10. Write 0x14 to Register 0x0571 (JESD204B link power-up).
11. Wait 5 ms to 10 ms.
12. Read Register 0x056F (PLL status register).
13. Write 0x4F to Register 0x1228.
14. Write 0x0F to Register 0x1228.
15. Write 0x00 to Register 0x1222.
16. Write 0x04 to Register 0x1222.
17. Write 0x00 to Register 0x1222.
18. Write 0x08 to Register 0x1262.
19. Write 0x00 to Register 0x1262.



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