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MB96F348CWCPMC-GSE2 Datasheet(PDF) 36 Page - Cypress Semiconductor

Part # MB96F348CWCPMC-GSE2
Description  8-byte instruction execution queue
PDF  109 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

MB96F348CWCPMC-GSE2 Datasheet(HTML) 36 Page - Cypress Semiconductor

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MB96340 Series
Document Number: 002-04579 Rev. *A
Page 36 of 109
000407H
PLL Control register High
PLLCRH
R/W
000408H
RC clock timer control register
RCTCR
R/W
000409H
Main clock timer control register
MCTCR
R/W
00040AH
Sub clock timer control register
SCTCR
R/W
00040BH
Reset cause and clock status register with clear function
RCCSRC
R
00040CH
Reset configuration register
RCR
R/W
00040DH
Reset cause and clock status register
RCCSR
R
00040EH
Watch dog timer configuration register
WDTC
R/W
00040FH
Watch dog timer clear pattern register
WDTCP
W
000410H-000414H
Reserved
-
000415H
Clock output activation register
COAR
R/W
000416H
Clock output configuration register 0
COCR0
R/W
000417H
Clock output configuration register 1
COCR1
R/W
000418H
Clock Modulator control register
CMCR
R/W
000419H
Reserved
-
00041AH
Clock Modulator Parameter register Low
CMPRL
CMPR
R/W
00041BH
Clock Modulator Parameter register High
CMPRH
R/W
00041CH-00042BH
Reserved
-
00042CH
Voltage Regulator Control register
VRCR
R/W
00042DH
Clock Input and LVD Control Register
CILCR
R/W
00042EH-00042FH
Reserved
-
000430H
I/O Port P00 - Data Direction Register
DDR00
R/W
000431H
I/O Port P01 - Data Direction Register
DDR01
R/W
000432H
I/O Port P02 - Data Direction Register
DDR02
R/W
000433H
I/O Port P03 - Data Direction Register
DDR03
R/W
000434H
I/O Port P04 - Data Direction Register
DDR04
R/W
000435H
I/O Port P05 - Data Direction Register
DDR05
R/W
000436H
I/O Port P06 - Data Direction Register
DDR06
R/W
000437H
I/O Port P07 - Data Direction Register
DDR07
R/W
000438H
I/O Port P08 - Data Direction Register
DDR08
R/W
000439H
I/O Port P09 - Data Direction Register
DDR09
R/W
00043AH
I/O Port P10 - Data Direction Register
DDR10
R/W
Table 4: I/O map MB96(F)34x
Address
Register
Abbreviation
8-bit access
Abbreviation
16-bit access
Access



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