L9779WD datasheet(62/170 Pages) STMICROELECTRONICS

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Functional description

L9779WD

62/170

DocID027452 Rev 5

6.9.4

LSd function OUT13 to 18 (relay drivers)

Figure 36. LSd function OUT13 to 18 (relay drivers)

LSd functionality description

LSd are 6 protected Low-Side drivers with diagnosis, and over current protection circuit.

They are driven via MicroSecond Channel interface.

When Reset_L9779 signal or OUT_DIS bit is asserted OUT_LSd is switched off.

The turn on/off time is fixed and the slew-rate is controlled.

OUT13 and OUT14 are able to remain active also during crank pulse when the battery

voltage on the VB pin goes below the level VB_LV for a period of time THOLD, this time

lapse calculation is triggered by the falling edge of RST. In this situation VDD5 is below

undervoltage threshold (VDD_UV) and the micro controller is in reset condition. During the

THOLD time the VDD5 supply and the micro controller have to recover and take over

control of the output. Otherwise the output is switched OFF after the THOLD time.

The low battery functionality can be enabled/disabled through bit OUT13_EN_LB and

OUT14_EN_LB of CONF_REG7.

Table 26. LSd electrical characteristics

Symbol

Parameter

Test condition

Min

Typ

Max Unit

OUT

13 to 18

RDS-on LSd

Drain source resistance

Iload = 0.6 A

1.5

Ω

IOUTlk

Output leakage current

Vpin = 13.5 V

µA

VS/R

Voltage S/R on/off

R = 21 Ω, C = 10 nF

From 80% to 30% of VOUT

2-6

V/µs

VS/R GateKill

FAST VR/S off when an

OVC fault happens

Load: 8 Ω, 10 nF; From

80% to 30% VOUT;

V/µs

TTurn-on_ LSd Turn-on delay time

From command to 80%

VOUT

Load: 21 Ω, 10nF

µs

TTurn-off_ LSd Turn-off delay time

From command to 30%

VOUT

Load: 21 Ω, 10 nF

µs

Vcl

Output clamping voltage

Iload = 0.6 A

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