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GXM Datasheet(PDF) 64 Page - National Semiconductor (TI) |
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GXM Datasheet(HTML) 64 Page - National Semiconductor (TI) |
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64 / 244 page  www.national.com 64 Revision 3.1 Processor Programming (Continued) Figure 3-6. Selector Mechanisms 15 3 2 1 0 INDEX TI INSTRUCTION OFFSET Segment Selector Segment Descriptor Base GDT or LDT Descriptor Table Main Memory Segment p p = Paging Mechanism RPL + Linear Address Address Physical Address 15 0 INDEX INSTRUCTION OFFSET Logical Address Base Main Memory Segment p + Linear Address Address Physical Address x16 p= Paging Mechanism for Virtual 8086 Mode only Real and Virtual 8086 Modes Address Logical Segment Selector Protective Mode Logical Address x8 |
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